All about a Verilog V200x parser project hosted at SourceForge:

Wednesday, December 30, 2009

Latest version includes (Synopsys) Liberty File parser

I (finally) uploaded an update here.

The most interesting new feature is support for Liberty Files (aka., .lib files).
Upon download, note a slight rearrangement of the directory structure:

slf/ --- files related to parsing of Synopsys Liberty Files
ssi/ --- files related to Simple Serialization Interface
v2k/ --- files related to Verilog parser

There is also an additional option --gen_xref which can be used to generate a module cross reference.

> v2k/bin/analyze

Usage: analyze --flatten? (--tcl out.tcl)? (--rb out.rb)? (--outf out.f)?
--only_used? --exit_on_err? (--verbose n)? --abs_paths?
(--redefn n)? (-E -C?)?
topModule vlogOpts+

--flatten : stop after flattening .f files.
: Useful with "--outf" to capture flat .f
: for subsequent processing.
--tcl out.tcl : dump details in tcl format to "out.tcl".
--rb out.rb : dump details in ruby format to "out.rb".
--outf out.f : dump details into flat Verilog .f file "out.f"
using only +incdir+, +define+ and file.v.
--only_used : only dump files which contained a module
: definition required for linking "topModule".
--exit_on_err : exit status != 0 if any parse errors.
And, no "out.tcl" generated if errors.
--verbose n : Verbose messages during linking. "n" is:
2 (most verbose) 1 (default); 0 (off).
--abs_paths : Make/display all file/directory names absolute.
Useful for debugging (the where of) include files.
--gen_xref : Generate "topModule.refs.txt".
Contains a cross-reference of module references.
-E : dump pre-processed files to "file.v.E".
Useful for debugging preprocessing issues.
-C : do not discard comments when "-E" is specified.

vlogOpts is one of:
-f args.f
-v library.v
-y library_directory
+no_defn+mod1(+modn)* : specify "mod1" as undefined
(a priori) so no link error.
+slf+f1.lib(+fi.lib)* : specify Synopsys Liberty File "f1.lib".

NOTE: a .f file can contain entries of the form "${VAR}/foo.v"
to specify that the value of the environment variable "VAR"
be used (i.e., replace ${VAR} with ENV['VAR'], in ruby parlance)
during .f file processing. This is useful to root file/directory
locations using an environment variable, rather than hardcoding
in .f files themselves.

The +slf+ option can be used to pass .lib files to resolve any (typically instantiated) library (leaf) or macro cells.

If any of the +slf+ file(s) are actually required to link the design, their filename(s) will be output into the out.tcl file specified using the --tcl option. The tcl list variable slf_used will be used.


Tom said...

Would like to use your parser--sounds pretty useful. But I gave it a simple .f file and it crashed. Is this due to a problem with the versions I have of jruby and java?

[tvolpe@phenom ~]$ analyze tb -f
Info : "/proj/ss/hw/soc/pwa/tvolpe/socdev/ss_rtl/tb/tb.v": processing... (FILE-3)
/usr/local/src/v2kparse/v2k/ruby/srcs/analyze.rb:132:in `to_java': wrong element type class org.jruby.RubyObject(array contains java.lang.String) (ArgumentError)
from /usr/local/src/v2kparse/v2k/ruby/srcs/analyze.rb:132:in `analyze'
from /usr/local/src/v2kparse/v2k/ruby/srcs/analyze.rb:530

[tvolpe@phenom ~]$ java -version
java version "1.6.0"
OpenJDK Runtime Environment (build 1.6.0-b09)
OpenJDK Server VM (build 1.6.0-b09, mixed mode)

[tvolpe@phenom ~]$ jruby -v
jruby 1.5.0.RC1 (ruby 1.8.7 patchlevel 249) (2010-04-14 0b08bc7) (OpenJDK Client VM 1.6.0) [i386-java]

kpfalzer said...

I uploaded a path to fix this issue (may be related to jruby version.):

1) goto:
2) download "analyze.rb"
3) cp analyze.rb v2k/ruby/srcs/analyze.rb

step 3) (above) replaces the analyze.rb in the release w/ the latest version.

Tom said...

Thanks. That helped a lot.

The files in the .f file are now all being read, but the parser is choking on some Verilog syntax in some third party memory models I am using. These models contain "specify" blocks for annotating timing and the parser doesn't seem to recognize the specify blocks at all. It gives an error "unexpected token: specify" and gives errors on everything within the specify block down to endspecify.

Anonymous said...

As the sourceforge site ( says: Verilog 2005 synthesizable subset ...

Those constructs (specify/endspecify) are not synthesizable.

A driving philosophy is to force separation of a clean/clear "what you build" dot-f from the whole simulation dot-f: you simulate implementation.f + simulation-only models (as in this case).

Since the parser expects synth-only, you need to modify the .f to not contain any simulation models; or, `ifdef SIMULATE (or similar) around any non-synth code.

Unknown said...

I downloaded sources from and have added vhdl, systemverilog and fixed some issues with the liberty parser.

I will be posting changes/updated to

Vijay said...

I am trying to analyze a synthesizable v2k file but find the tool croak's with hundreds of errors. Is the tool still being maintained? Where and how should I send the bug reports?

Anonymous said...


Vijay said...

Anon, I assume that you own the project at github. I tried that too. I am getting similar errors. So the same question about that project. How do I submit bug reports :)

George P. Burdell said...

Hi Vijay,
Plz post some details about the issues you are having: or directly to